Known multi core processor platforms comprise one or more central processor units (CPU) which can each have multiple processing cores which share memory and I/O (input and output) resources. The multiple core architecture enables simultaneous execution of processes or “threads” on more than one core. Such multi core processors have been developed to increase platform processing capacity over that of single core processors.
In multi core symmetric multiprocessing processing (SMP) architecture the system memory is shared so any processor core can work on any task regardless of where the data for that task resides in system memory. It is also known for multi core systems to utilise a cache memory shared between multiple cores of the one CPU.
Multi core processor platforms may be used as servers in a network, such as an Ethernet local area network (LAN). Server architecture can comprise a plurality of processors, however, are physically connected to the network using only one LAN interface or network interface card (NIC) connected to one processor core. This network interface can only interrupt one processor core when packets are received from the network. The received packet is then processed through the network stack in the interrupted core until it reaches the application. Thus, the network connected processor core must be used for all data received from the network. In the case of high speed TCP/IP applications or any network stack applications and high bandwidth networks, such as Gigabit and ten Gigabit Ethernet networks, the full server processing capacity may not be realised due to throughput of data between the network and the server being limited by saturation of the network connected processor core.
Current solutions to overcome this problem require the server to be provided with further network interfaces connected to further processors in order to distribute the network interface processing load across multiple processors. This solution can improve throughput between the server and the network, but is inefficient as it requires additional network interface cards. This solution also introduces an additional overhead for coordination of the multiple network interfaces.
Another proposed solution to this problem is to redistribute network stack operations for inbound data to various cores by the network interface. This solution requires interoperability between the LAN or network interface and the processor operating system. Thus, modification of the network interface and operating system is required to implement such a solution, so this solution cannot be implemented with standard currently available network interfaces.
There is a need for server architecture to improve throughput between a network and a server having multi core processor architecture.